Recently, in mobile electronic devices such as portable telephones, notebook-sized personal computers, PDAs and digital video cameras, technology development for realizing small-size, light-weight and high-performance devices has been rapidly advanced.
One principle electronic component for supporting this technology development is a semiconductor element. Thinner and higher-density semiconductor element, that is, finer wiring rule and increased pins of an electrode terminal have been remarkably developed. Accordingly, an insulating layer of a semiconductor element has been strictly demanded to have a low dielectric constant (Low-k). Therefore, the insulating layer has been replaced with a porous layer of, for example, p—SiOC and an organic polymer. Under such circumstances, strict requirements have been made with respect to a bump used in flip-chip mounting a semiconductor element on a mounting board.
Conventionally, a technology for mounting electronic components such as a semiconductor element on various wiring boards with a high density includes a flip-chip mounting technology. In usual flip-chip mounting, a metal bump having, for example, a diameter of about 150 μm and made of solder, gold, or the like, is previously formed on an electrode terminal formed on a semiconductor element such as LSI. Then, the semiconductor element is subjected to pressure contact and heating, and bump-connected to and mounted on a connection terminal of a mounted board by face-down bonding.
In particular, in order to correspond to remarkably increased pins, a bump is formed by using an entire surface of a semiconductor element on which a circuit is formed. This bump forming method is called an area bump method. In this method, since it is necessary to follow warp on the entire mounting area of the circuit board at the time of mounting, a bump having a high aspect ratio is demanded. For example, when a next generation LSI having more than 5000 electrode terminals is mounted on a circuit board, it is necessary to form a bump corresponding to a narrow pitch of not more than 100 μm and having a high aspect ratio. However, it is difficult for current solder-bump formation technologies to meet such requirements. Conventionally, a plating method, a screen printing method, and the like, are employed as a bump formation technology. However, although the plating method is suitable for forming bumps with a narrow pitch, the process is complicated and the productivity is low. Meanwhile, although the screen printing method is excellent in productivity, use of a mask makes it difficult to satisfy both a narrow pitch and a high aspect ratio.
Furthermore, in the area bump method, a weak dielectric material, a transistor, and the like, are disposed immediately beneath an electrode terminal of a semiconductor element. However, in a technology in which mounting is carried out by using a metal bump, a pressurizing force is necessary at the time of press contact, and a large load is applied to a portion beneath the electrode terminal of the semiconductor element. Therefore, in a semiconductor element including a porous and weak insulating layer, destruction of the insulating layer, element cracking, and fluctuation of the element property of the semiconductor element may occur.
In such circumstances, some technologies for selectively forming solder bumps on electrode terminals of an LSI chip or connection terminals of a circuit board have been proposed recently. These technologies are suitable for forming fine bumps. Furthermore, they are capable of forming bumps collectively, so that a high productivity can be achieved. These technologies have been receiving much attention as a mounting technology for a circuit board of next generation LSI.
As one of the above-mentioned technologies, a method for forming bumps selectively on a connection terminal by immersing a circuit board having electrode terminals on the surface thereof in a chemicals so as to form an adhesive film only on the surface of the connection terminals, adhesively attaching solder powder to the adhesive film, and then heating and melting thereof has been disclosed (see, for example, patent document 1).
However, such technologies show a method for forming a bump on an electrode terminal of a semiconductor element or on a connection terminal of a circuit board. That is to say, the usual flip chip mounting needs a process of forming a bump, then mounting a semiconductor element on the circuit board, bonding a connection terminal and an electrode terminal to each other by solder reflow via the bump, and a process of fixing the semiconductor element to the circuit board by filling an underfill material between the circuit board and the semiconductor element. As a result, in order to allow the underfill material to fill in entirely between the circuit board and the semiconductor element, a flux washing process is needed, causing cost increase.
In order to solve such problems, recently, a method for electrically connecting only a predetermined conductive portion by heating and pressurizing with a film made of an anisotropic conductive adhesive agent containing conductive particles sandwiched between a protruding electrode on a semiconductor element and a connection terminal on the circuit board has been disclosed (see, for example, patent document 2).
Furthermore, an example is disclosed in which a thermosetting resin containing solder particles (conductive adhesive agent) is provided between an electrode terminal of a semiconductor element and a land of a circuit board, the resin is heated at the same time when the semiconductor element is pressurized so as to melt solder particles before the resin is cured (see, for example, patent document 3). Thus, electric connection between an electrode terminal of a semiconductor element and a land of a circuit board is carried out at the same time the semiconductor element and the circuit board are bonded to each other.
Furthermore, a method for forming a solder bump by light-exposing and developing a predetermined portion of a semiconductor element coated with solder particles photosensitive resin in which solder particles are contained in photosensitive resin is disclosed (see, for example, patent document 4). Thus, a solder bump having a structure in which solder particles are distributed in resin can be produced with high productivity. Furthermore, it discloses that a semiconductor element can be coupled to a wiring board with a solder bump by pressing the semiconductor element to the wiring board by a clamping circuit.
Furthermore, in general, in a connection method using a conductive bump having an elasticity capable of relieving the restriction of flatness of the mounting board, when the content of resin is increased in order to secure the elasticity, high conductivity cannot be obtained. Meanwhile, the mixing amount of the conductive filler is increased in order to secure high conductivity, the rubber elasticity of resin cannot be used sufficiently. As a result, a large load is required at the time of mounting. Furthermore, it is necessary to control height variation of the conductive bump with high accuracy. In order to solve such problems, a formation method for mixing needle-like conductive filler including whisker as a core material with resin having rubber elasticity and curing the mixture with heat or ultraviolet ray is disclosed (see, for example, patent document 5).
However, the conductive bump disclosed in each of the above-mentioned patent documents is formed of a conductive paste obtained by mixing conductive filler made of solder powder or powder of metal such as Ag, Cu and Au with thermosetting resin or photo-curing resin. Therefore, in order to reduce the connection resistance between electronic components to be connected, it is necessary to contain a certain amount or more of conductive fillers. As a result, when the amount of resin necessary to improve the mechanical bond strength between electrode terminals is reduced, the bond strength is reduced, which causes a problem of connection reliability. Furthermore, in the photosensitive resin, when a certain amount or more of conductive fillers is contained, light is shielded by them. Therefore, in particular, when a portion that is not reacted (not-cured) occurs around the electrode terminal, the bonding strength with respect to the electrode terminal cannot be secured.    [Patent document 1] Japanese Patent Application Unexamined Publication No. H7-74459    [Patent document 2] Japanese Patent Application Unexamined Publication No. 2000-332055    [Patent document 3] Japanese Patent Application Unexamined Publication No. 2004-260131    [Patent document 4] Japanese Patent Application Unexamined Publication No. H5-326524    [Patent document 5] Japanese Patent Application Unexamined Publication No. 2004-51755